CSR: Small: Middleware Technologies for Multi-Accelerator Clusters

Today many computing systems include, besides traditional processors, a variety of hardware accelerators. Hardware accelerators are devices that are not suited to run generic applications but can execute specific applications or portions of applications significantly faster than traditional processors. Two popular hardware accelerators are Graphics Processing Units (GPUs) and Field Programmable Gate Arrays (FPGAs), which are architecturally very diverse and provide various degrees of performance and power efficiency depending on the application they run. The combined use of these accelerators in a computing system, whether a single machine or a set of interconnected machines, involves significant challenges.

The goal of this project is to design a software layer allowing the effective use of diverse hardware accelerators on computing systems. Specifically, this work has the following objectives. First, the design of mapping techniques to execute applications on the available devices transparently from the end user's perspective while optimizing system utilization and maximizing performance (possibly under power consumption constraints). Second, the project will design a memory unification layer to abstract the underlying distributed memory system, while providing programmability, performance, memory protection and applications isolation. Third, the project will design various techniques to share FPGAs across applications.

As a broader impact, this project aims to facilitate the adoption of diverse accelerators on servers and compute clusters, allowing better performance and power efficiency without increasing the programming effort. Specifically, the combined use of GPUs and FPGAs can allow leveraging the various strengths of these devices on a broad range of applications with different computational patterns and resource requirements. Further, this project aims to improve software stacks to support the Open Computing Language framework on FPGAs. Finally, the impact will be extended by incorporating related topics in existing courses and involving undergraduate students in high-performance computing research.

Software artifacts originated from this project will be stored on machines administered by North Carolina State Electrical and Computer Engineering's Information Technology team for a minimum of ten years. Some software artifacts will be released in open-source and made available through North Carolina State Github (https://github.ncsu.edu) or the investigators website. Instructional materials will be made available through North Carolina State's WolfWare system. Publications will be maintained and distributed by the appropriate journals and conference proceedings.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.