CSR-PSCE, SM: Exploring Helper Computing Parallelism in Multicore Architectures

Current trends in computing architectures and programming support the rationales for the proposed project. One trend is the increasing complexity of software both in terms of the number of lines of source code, and number of layers (hypervisor, guest OS, libraries, virtual machines, applications, etc.). This increase in complexity could make software even more vulnerable to bugs and security attacks in the future. Another trend is the increasing support for thread-level parallelism in mainstream microprocessors through chip multi-processor (CMP) architectures. Four and eight processor cores per chip have either been realized or are in the future roadmap of major chipmakers. Currently, mostly applications with natural thread-level parallelism (server and scientific computing workloads) can benefit from them. Increasing reliability and security requirements support parallelism opportunities for common applications, and such parallelism may effectively be exploited through helper computing.

This project will address these issues by engaging in the following: exploring helper-computing's potentials for speeding up software reliability and security meta-functions with scenario-guided studies; a systematic, cross-layered study of efficient Meta-function Design, Extraction, Optimization, and Dynamic Adaptation to achieve low overhead execution in the main application; exploration of a prototype system which includes compiler, libraries, run-time system, OS support, and possibly hardware support. The exploration for such support will be holistic, i.e. by considering implementation layers that produce the best trade-offs in the feasibility of the solution in current systems, generality, and performance requirements. This prototype system will be made available to the public.

This team also proposes to create an advanced course that focuses on helper computing, and integrate its basic elements into existing hardware and software courses. Such courses would integrate programming language, compiler, OS, runtime system, and hardware in a synergistic way, helping to train future workforce with unique and integrated expertise in these areas.